Brain-inspired computing with resistive switching memory (RRAM): Devices, synapses and neural networks

Williams, 2017, What's next?, Comput. Sci. Eng., 19, 7, 10.1109/MCSE.2017.31

Kuhn, 2012, Considerations for ultimate CMOS scaling, IEEE Trans. Electron Devices, 59, 1813, 10.1109/TED.2012.2193129

Ionescu, 2011, Tunnel field-effect transistors as energy-efficient electronic switches, Nature, 479, 329, 10.1038/nature10679

Salahuddin, 2008, Use of negative capacitance to provide voltage amplification for low power nanoscale devices, Nano Lett., 8, 405, 10.1021/nl071804g

Nikonov, 2013, Overview of beyond-CMOS devices and a uniform methodology for their benchmarking, Proc. IEEE, 101, 2498, 10.1109/JPROC.2013.2252317

Aly, 2015, Energy-efficient abundant-data computing: the N3XT 1,000x, Computer, 48, 24, 10.1109/MC.2015.376

Wong, 2015, Memory leads the way to better computing, Nat. Nanotechnol., 10, 191, 10.1038/nnano.2015.29

Borghetti, 2010, ‘Memristive’ switches enable ‘stateful’ logic operations via material implication, Nature, 464, 873, 10.1038/nature08940

Cassinerio, 2013, Logic computation in phase change materials by threshold and memory switching, Adv. Mater., 25, 5975, 10.1002/adma.201301940

Lehtonen, 2009, Stateful implication logic with memristors, 33

Kvatinsky, 2014, Memristor-based material implication (IMPLY) logic: design principles and methodologies, IEEE Trans. Very Large Scale Integr. VLSI Syst., 22, 2054, 10.1109/TVLSI.2013.2282132

Balatti, 2015, Normally-off logic based on resistive switches - part I: logic gates, IEEE Trans. Electron Devices, 62, 1831, 10.1109/TED.2015.2422999

Balatti, 2015, Normally-off logic based on resistive switches - part II: logic circuits, IEEE Trans. Electron Devices, 62, 1839, 10.1109/TED.2015.2423001

Li, 2013, Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory, J. Appl. Phys., 114, 10.1063/1.4852995

Chen, 2015, Efficient in-memory computing architecture based on crossbar arrays, 17.5.1

Huang, 2016, Reconfigurable nonvolatile logic operations in resistance switching crossbar array for large-scale circuits, Adv. Mater., 28, 9758, 10.1002/adma.201602418

Xie, 2017, Scouting logic: a novel memristor-based logic design for resistive computing

Rosezin, 2011, Crossbar logic using bipolar and complementary resistive switches, IEEE Electron Device Lett., 32, 710, 10.1109/LED.2011.2127439

Breuer, 2015, A HfO2-based complementary switching crossbar adder, Adv. Electron. Mater., 1, 10.1002/aelm.201500138

Indiveri, 2011, Neuromorphic silicon neuron circuits, Front. Neurosci., 5, 73, 10.3389/fnins.2011.00073

Merolla, 2014, A million spiking-neuron integrated circuit with a scalable communication network and interface, Science, 345, 668, 10.1126/science.1254642

Indiveri, 2015, Memory and information processing in neuromorphic systems, Proc. IEEE, 103, 1379, 10.1109/JPROC.2015.2444094

Burr, 2015, Experimental demonstration and tolerancing of a large-scale neural network (165,000 synapses) using phase-change memory as the synaptic weight element, IEEE Trans. Electron Devices, 62, 3498, 10.1109/TED.2015.2439635

Bichler, 2012, Visual pattern extraction using energy-efficient “2-PCM synapse” neuromorphic architecture, IEEE Trans. Electron Devices, 59, 2206, 10.1109/TED.2012.2197951

Pedretti, 2017, Memristive neural network for on-line learning and tracking with brain-inspired spike timing dependent plasticity, Sci. Rep., 7, 5288, 10.1038/s41598-017-05480-0

Yao, 2017, Face classification using electronic synapses, Nat. Commun., 8, 10.1038/ncomms15199

Prezioso, 2015, Training and operation of an integrated neuromorphic network based on metal-oxide memristors, Nature, 521, 61, 10.1038/nature14441

Sheridan, 2017, Sparse coding with memristor networks, Nat. Nanotechnol., 12, 784, 10.1038/nnano.2017.83

Ignatov, 2017, Memristive stochastic plasticity enables mimicking of neural synchrony: memristive circuit emulates an optical illusion, Sci. Adv., 3, 10.1126/sciadv.1700849

Wright, 2011, Arithmetic and biologically-inspired computing using phase-change materials, Adv. Mater., 23, 3408, 10.1002/adma.201101060

Hosseini, 2015, Accumulation-based computing using phase-change memories with FET access devices, IEEE Electron Device Lett., 36, 975, 10.1109/LED.2015.2457243

Jo, 2010, Nanoscale memristor device as synapse in neuromorphic systems, Nano Lett., 10, 1297, 10.1021/nl904092h

Ambrogio, 2013, Spike-timing dependent plasticity in a transistor-selected resistive switching memory, Nanotechnology, 24, 10.1088/0957-4484/24/38/384012

Kuzum, 2012, Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing, Nano Lett., 12, 2179, 10.1021/nl201040y

Yu, 2011, An electronic synapse device based on metal oxide resistive switching memory for neuromorphic computation, IEEE Trans. Electron Devices, 58, 2729, 10.1109/TED.2011.2147791

Seo, 2011, Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device, Nanotechnology, 22, 254023, 10.1088/0957-4484/22/25/254023

Wang, 2015, A 2-transistor/1-resistor artificial synapse capable of communication and stochastic learning for neuromorphic systems, Front. Neurosci., 8, 438, 10.3389/fnins.2014.00438

Kim, 2015, NVM neuromorphic core with 64k-cell (256-by-256) phase change memory synaptic array with on-chip neuron circuits for continuous in-situ learning, 443

Ambrogio, 2016, Neuromorphic learning and recognition with one-transistor-one-resistor synapses and bistable metal oxide RRAM, IEEE Trans. Electron Devices, 63, 1508, 10.1109/TED.2016.2526647

Pickett, 2013, A scalable neuristor built with Mott memristors, Nat. Mater., 12, 114, 10.1038/nmat3510

Tuma, 2016, Stochastic phase-change neurons, Nat. Nanotechnol., 11, 693, 10.1038/nnano.2016.70

LeCun, 1998, Gradient-based learning applied to document recognition, Proc. IEEE, 86, 2278, 10.1109/5.726791

Ambrogio, 2014, Analytical modeling of oxide-based bipolar resistive memories and complementary resistive switches, IEEE Trans. Electron Devices, 61, 2378, 10.1109/TED.2014.2325531

Yu, 2013, A low energy oxide-based electronic synaptic device for neuromorphic visual systems with tolerance to device variation, Adv. Mater., 25, 1774, 10.1002/adma.201203680

Yu, 2015, Scaling-up resistive synaptic arrays for neuro-inspired architecture: challenges and prospect, 451

Wang, 2014, 3D synaptic architecture with ultralow sub-10 fJ energy per spike for neuromorphic computation, 665

Park, 2013, Neuromorphic speech systems using advanced ReRAM-based synapse, 625

Jang, 2015, Optimization of conductance change in Pr1-xCaxMnO3-based synaptic devices for neuromorphic systems, IEEE Electron Device Lett., 36, 457, 10.1109/LED.2015.2418342

Moon, 2017, Improved conductance linearity and conductance ratio of 1T2R synapse device for neuromorphic systems, IEEE Electron Device Lett., 38, 1023, 10.1109/LED.2017.2721638

Ambrogio, 2015, Noise-induced resistance broadening in resistive switching memory – part II: array statistics, IEEE Trans. Electron Devices, 62, 3812, 10.1109/TED.2015.2477135

Ielmini, 2010, Resistance-dependent amplitude of random telegraph signal noise in resistive switching memories, Appl. Phys. Lett., 96, 10.1063/1.3304167

Ambrogio, 2014, Statistical fluctuations in HfOx resistive-switching memory: part II – random telegraph noise, IEEE Trans. Electron Devices, 61, 2920, 10.1109/TED.2014.2330202

Soni, 2010, Probing Cu doped Ge0.3Se0.7 based resistance switching memory devices with random telegraph noise, J. Appl. Phys., 107, 10.1063/1.3291132

Ralls, 1991, Microscopic study of 1/f noise in metal nanobridges, Phys. Rev. B Condens. Matter, 44, 5800, 10.1103/PhysRevB.44.5800

Kozicki, 2005, Nanoscale memory elements based on solid-state electrolytes, IEEE Trans. Nanotechnol., 4, 331, 10.1109/TNANO.2005.846936

Russo, 2009, Study of multilevel programming in programmable metallization cell (PMC) memory, IEEE Trans. Electron Devices, 56, 1040, 10.1109/TED.2009.2016019

Schindler, 2008, Low current resistive switching in cu–SiO2 cells, Appl. Phys. Lett., 92, 10.1063/1.2903707

Valov, 2011, Electrochemical metallization memories—fundamentals, applications, prospects, Nanotechnology, 22, 10.1088/0957-4484/22/25/254003

Jameson, 2011, One-dimensional model of the programming kinetics of conductive-bridge memory cells, Appl. Phys. Lett., 99, 10.1063/1.3623485

Waser, 2009, Redox-based resistive switching memories-Nanoionic mechanisms, prospects, and challenges, Adv. Mater., 21, 2632, 10.1002/adma.200900375

Ielmini, 2011, Modeling the universal set/reset characteristics of bipolar RRAM by field- and temperature-driven filament growth, IEEE Trans. Electron Devices, 58, 4309, 10.1109/TED.2011.2167513

Larentis, 2012, Resistive switching by voltage-driven ion migration in bipolar RRAM – part II: modeling, IEEE Trans. Electron Devices, 59, 2468, 10.1109/TED.2012.2202320

Ambrogio, 2014, Impact of the mechanical stress on switching characteristics of electrochemical resistive memory, Adv. Mater., 26, 3885, 10.1002/adma.201306250

Bricalli, 2016, SiOx-based resistive switching memory (RRAM) for crossbar storage/select elements with high on/off ratio, 87

Wang, 2017, Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing, Nat. Mater., 16, 101, 10.1038/nmat4756

Midya, 2017, Anatomy of Ag/Hafnia-based selectors with 1010 nonlinearity, Adv. Mater., 29, 10.1002/adma.201604457

Bricalli, 2018, Resistive switching device technology based on silicon oxide for improved on-off ratio – part II: select devices, IEEE Trans. Electron Devices, 65, 115, 10.1109/TED.2017.2777986

Wedig, 2016, Nanoscale cation motion in TaOx, HfOx and TiOx memristive systems, Nat. Nanotechnol., 11, 67, 10.1038/nnano.2015.221

Bricalli, 2018, Resistive switching device technology based on silicon oxide for improved on-off ratio – part I: memory devices, IEEE Trans. Electron Devices, 65, 122, 10.1109/TED.2017.2776085

Nardi, 2012, Resistive switching by voltage-driven ion migration in bipolar RRAM – part I: experimental study, IEEE Trans. Electron Devices, 59, 2461, 10.1109/TED.2012.2202319

Marchewka, 2016, Nanoionic resistive switching memories: On the physical nature of the dynamic reset process, Adv. Electron. Mater., 2, 1500233, 10.1002/aelm.201500233

Menzel, 2012, Simulation of multilevel switching in electrochemical metallization memory cells, J. Appl. Phys., 111, 014501, 10.1063/1.3673239

Bi, 1998, Synaptic modifications in cultured hippocampal neurons: dependence on spike timing, synaptic strength, and post synaptic cell type, J. Neurosci., 18, 10464, 10.1523/JNEUROSCI.18-24-10464.1998

Wittenberg, 2006, Malleability of spike-timing-dependent plasticity at the CA3–CA1 synapse, J. Neurosci., 26, 6610, 10.1523/JNEUROSCI.5388-05.2006

Abbott, 2000, Synaptic plasticity: taming the beast, Nat. Neurosci., 3, 1178, 10.1038/81453

Gjorgjieva, 2011, A triplet spike-timing–dependent plasticity model generalizes the Bienenstock–Cooper–Munro rule to higher-order spatiotemporal correlations, Proc. Natl. Acad. Sci. U. S. A., 108, 19383, 10.1073/pnas.1105933108

Rachmuth, 2011, A biophysically-based neuromorphic model of spike rate- and timing-dependent plasticity, Proc. Natl. Acad. Sci. U. S. A., 108, E1266, 10.1073/pnas.1106161108

Indiveri, 2006, A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity, IEEE Trans. Neural Netw., 17, 211, 10.1109/TNN.2005.860850

Diorio, 1996, A single-transistor silicon synapse, IEEE Trans. Electron Devices, 43, 1972, 10.1109/16.543035

Ambrogio, 2016, Unsupervised learning by spike timing dependent plasticity in phase change memory (PCM) synapses, Front. Neurosci., 10, 56, 10.3389/fnins.2016.00056

Ohno, 2011, Short-term plasticity and long-term potentiation mimicked in single inorganic synapses, Nat. Mater., 10, 591, 10.1038/nmat3054

Rojas, 1996

Minsky, 1969

Diehl, 2015, Unsupervised learning of digit recognition using spike-timing-dependent plasticity, Front. Comput. Neurosci., 9, 99, 10.3389/fncom.2015.00099

Tuma, 2016, Detecting correlations using phase-change neurons and synapses, IEEE Electron Device Lett., 37, 1238, 10.1109/LED.2016.2591181

Serb, 2016, Unsupervised learning in probabilistic neural networks with multi-state metal-oxide memristive synapses, Nat. Commun., 7, 10.1038/ncomms12611

Covi, 2016, Analog memristive synapse in spiking networks implementing unsupervised learning, Front. Neurosci., 10, 482, 10.3389/fnins.2016.00482

Hansen, 2017, Double-barrier memristive devices for unsupervised learning and pattern recognition, Front. Neurosci., 11, 91, 10.3389/fnins.2017.00091

Milo, 2016, Demonstration of hybrid CMOS/RRAM neural networks with spike time/rate-dependent plasticity, 440

Milo, 2017, Attractor networks and associative memories with STDP learning in RRAM synapses, 11.2.1