Automated synthesis of asynchronous interface circuits
Tài liệu tham khảo
Seitz, 1981
Huffman, 1954, The synthesis of sequential switching circuits, J. Franklin Inst., Vol 257, 161, 10.1016/0016-0032(54)90574-8
Huffman, 1954, The synthesis of sequential switching circuits, J. Franklin Inst., Vol 257, 275, 10.1016/0016-0032(54)90618-3
Tracey, 1966, Internal state assignments for asynchronous sequential machines, IEEE Trans. Electron. Comput., Vol EC-15, 551, 10.1109/PGEC.1966.264362
Unger, 1969
Alur, 1990, Model-checking for real-time systems, 414
Muller, 1959, A theory of asynchronous circuits, 204
Miller, 1965, Vol 2
Armstrong, 1969, Design of asynchronous circuits assuming unbounded gate delays, IEEE Trans. Comput., Vol C-18, 1110, 10.1109/T-C.1969.222594
Varshavsky, 1990
Moon, 1991, Synthesis of hazard-free asynchronous circuits from graphical specifications
Beerel, 1992, Gate-level synthesis of speed-independent asynchronous control circuits
Udding, 1986, A formal model for defining and classifying delay-insensitive circuits and systems, Distrib. Comput., Vol 1, 197, 10.1007/BF01660032
Patil, 1971, Speed independent asynchronous circuits, 55
Martin, 1990, The limitations to delay-insensitivity in asynchronous circuits
Burns, 1987, A synthesis method for selftimed VLSI circuits
Rosenberger, 1988, Q-modules: Internally clocked delay-insensitive modules, IEEE Trans. Comput., Vol 37, 10.1109/12.2252
Ebergen, 1989
Brunvand, 1989, Translating concurrent programs into delay-insensitive circuits, 262
Josephs, 1990, Delay-insensitive circuits: An algebraic approach to their design, Vol 458, 342
Sutherland, 1989, Micropipelines, Comm. ACM, 10.1145/63526.63532
Rosenblum, 1985, Signal graphs: from self-timed to timed ones
Chu, 1986, Synthesis of self-timed control circuits from graphs: an example, 565
Chu, 1987, Synthesis of self-timed VLSI circuits from graph-theoretic specifications
Kishinevsky, 1992, On self-timed behavior verification
Meng, 1988, Asynchronous design for digital signal processing architectures
Sentovich, 1992, Sequential circuit design using synthesis and optimization
Sentovich, 1992, SIS: A system for sequential circuit synthesis
Lavagno, 1991, Synthesis of verifiably hazard-free asynchronous control circuits
Lavagno, 1991, Algorithms for synthesis of hazard-free asynchronous circuits
Lavagno, 1991, Synthesis for testability techniques for asynchronous circuits
Lavagno, 1992, Solving the state assignment problem for signal transition graphs
Lavagno, 1992, Linear programming for optimal hazard removal in asynchronous circuits
Borriello, 1988, A new interface specification methodology and its application to transducer synthesis
Petri, 1962, Kommunikation mit Automaten
Peterson, 1977, Vol 9
Murata, 1989, Petri nets: Properties, analysis and applications, 541
Stevens, 1986, The post office — communication support for distributed ensemble architectures
Chu, 1992, Synthesis of hazard-free control circuits form asynchronous finite state machine specifications
Nowick, 1991, Automatic synthesis of locally-clocked asynchronous state machines
Shankar, 1989, Build a VMEbus interface with PAL devices, Electron. Des., Vol 37, 55
