Area-efficient fully digital memory using minimum height standard cells for near-threshold voltage computing

Integration - Tập 65 - Trang 201-210 - 2019
Jun Shiomi1, Tohru Ishihara1, Hidetoshi Onodera1
1Department of Communications and Computer Engineering, Kyoto University, Yoshida-honmachi, Sakyo-ku, Kyoto 606-8501, Japan

Tài liệu tham khảo

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