Mayberry M, Johnson J, Shahriari N, et al. Realizing the benefits of structural test for Intel microprocessors [A]. International Test Conference[C]. 2002, 456–463.
Golshan F. Test and on-line debug capabilities of IEEE Std 1149.1 in UltraSPARC™-III microprocessor[A]. International Test Conference, Proceedings[C]. 2000, 141–150.
Bhavsar D, Tan R. Observability register architecture for efficient production test and debug of VLSI circuits [A]. Fourteenth International Conference on VLSI Design [C]. 2001, 385–390.
Corno F, Cumani G, Sonza Reorda M, et al. Fully automatic test program generation for microprocessor cores [A]. Design, Automation and Test in Europe Conference and Exhibition[C]. 2003, 1006–1011.
Hwang S, Abraham J A. Test data compression and test time reduction using an embedded microprocessor [J]. IEEE Trans. on Very Large Scale Integration (VLSI) Systems, 2003, 11(5): 853–862.
Hu Wei-wu, Tang Zhi-min. Architecture of Godson-1 processor[J]. China Journal of Computer, 2003, 26(4): 385–396.
Thatte S M, Abraham J A, Test generation for microprocessors [J]. IEEE Trans. on Computers, 1980, C-29 (6): 429–441.
Brahme D, Abraham J A. Functional testing of microprocessors[J]. IEEE Trans. on Computers, 1984, C 33 (6): 475–485.
El-Sayed, Weiss S, Smith J. Microprocessors functional testing techniques[J]. IEEE Trans. on Computer-Aided Design, 1989, 8(3):316–318.
Zhang Shen-bin. Testibility Design of High-perform CPU [D]. Doctoral Dissertation, Northwest Industrial University, Xi’an, China, 1989, 51–53 (in Chinese).