An efficient test vector compression scheme using selective huffman coding

Abhijit Jas1, J. Ghosh-Dastidar2, Mom-Eng Ng3, Nur A. Touba4
1Intel Corporation, Austin, TX, USA
2Altera Corporation, San Jose, CA, USA
3Advanced Micro Devices, Inc., Austin, TX, USA
4Computer Engineering Research Center, Department of Electrical and Computer Engineering, University of Technology, Austin, TX, USA

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