Adjusting the position of the optimum operating point of a power heterostructure field-effect transistor by forming a gate potential barrier based on a donor-acceptor structure

Pleiades Publishing Ltd - Tập 41 - Trang 142-145 - 2015
V. M. Lukashin1, A. B. Pashkovskii1, V. G. Lapin1, S. V. Shcherbakov1, K. S. Zhuravlev2, A. I. Toropov2, A. A. Kapralova1
1Istok Research and Production Corp., Fryazino, Moscow oblast, Russia
2Rzhanov Institute of Semiconductor Physics, Siberian Branch, Russian Academy of Sciences, Novosibirsk, Russia

Tóm tắt

The first results obtained in engineering research into power heterostructure field-effect transistors operating under zero gate bias are detailed. At a frequency of 10 GHz in pulse mode under gate voltages ranging from −0.2 to +0.2 V, transistors with L-shaped gates with a length of about 0.3 μm and a width of 0.8 mm exhibited a specific power in excess of 1.6 W/mm at a gain in excess of 11 dB and a power-added efficiency of more than 40%.

Tài liệu tham khảo

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