A high-speed realization of a residue to binary number system converter

10.1109/TCS.1985.1085689

10.1049/el:19880812

10.1109/31.7576

10.1109/31.55049

10.1109/31.14470

hwang, 1979, Computer Arithmetic Principles Architecture and Design

wakerly, 1976, One's complement adder eliminates unwanted zero, Electron, 103

10.1109/12.250610

10.1109/TCS.1985.1085716

10.1109/TC.1982.1676036

10.1109/TCS.1981.1085027

10.1109/TCS.1978.1084495

wrzyszcz, 1993, A new modulo 2<superscript>a</superscript> + 1 multiplier, Proceedings ICC'93, 614

1986, Residue Number System Arithmetic Modern Applications in Digital Signal Processing

szabo, 1967, Residue Arithmetic and its Applications to Computer Technology

10.1109/TCS.1981.1084942