A New Quasi-2-D Threshold Voltage Model for Short-Channel Junctionless Cylindrical Surrounding Gate (JLCSG) MOSFETs
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Tài liệu tham khảo
yeh, 1995, physical subthreshold mosfet modeling applied to viable design of deep-submicrometer fully depleted soi low-voltage cmos technology, IEEE Trans Electron Devices, 42, 1605, 10.1109/16.405274
2003, DESSIS 2-D/3-D Device Simulator
2009, The International Technology Roadmap for Semiconductors