A New Quasi-2-D Threshold Voltage Model for Short-Channel Junctionless Cylindrical Surrounding Gate (JLCSG) MOSFETs

IEEE Transactions on Electron Devices - Tập 59 Số 11 - Trang 3127-3129 - 2012
Te‐Kuang Chiang1
1Electr. Eng. Dept., Nat. Univ. of Kaohsiung, Kaohsiung, Taiwan

Tóm tắt

Từ khóa


Tài liệu tham khảo

10.1109/LED.2011.2127441

10.1109/TED.2009.2039093

10.1016/j.sse.2009.12.003

10.1109/TED.2011.2159608

10.1109/LED.2011.2158978

10.1016/j.mee.2004.10.005

yeh, 1995, physical subthreshold mosfet modeling applied to viable design of deep-submicrometer fully depleted soi low-voltage cmos technology, IEEE Trans Electron Devices, 42, 1605, 10.1109/16.405274

10.1063/1.3079411

2003, DESSIS 2-D/3-D Device Simulator

2009, The International Technology Roadmap for Semiconductors