Modeling CMOS gates driving RC interconnect loads
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Tài liệu tham khảo
hirata, 1996, estimation of short-circuit power dissipation for static cmos gates, IEICE Trans Fundament, e79 a, 304
rabaey, 1996, Digital Integrated Circuits A Design Perspective
o brien, 1989, modeling the driving-point characteristic of resistive interconnect for accurate delay estimation, Proc IEEE Int Conf Computer‐ Aided Design, 512
hirata, 1997, estimation of short-circuit power dissipation for static cmos gates driving a <formula><tex>$crc$</tex></formula><formula> <tex>$\pi$</tex></formula> load, Proc 5th Int Workshop Power Timing Modeling Optimization and Simulation PATMOS 95, 279