A Processor Utilization Model for a Multiprocessor Computer System

Using a G/M/s/N queuing system model, we develop a processor utilization model for a simplified multiprocessor computer system. Jobs are assumed to arrive according to a general input process, and each job is assigned randomly to an available processor. A finite capacity input buffer is used if no processor is available. The mathematical model is based on the busy period analysis, and two utilization measures are derived: processor utilization (the fraction of processor occupation time during a busy cycle) and system utilization (the fraction of actual utilization time for all processors). A computational model for these utilization measures is developed through an imbedded Markov chain approach. Experimentation with the computational model reveals the sensitivity of the model to variability in the arrival process. Comparison of 2-processor and 4-processor systems from the operator perspective indicates a qualified preference for the behavior of the 2-processor system. This preference must be carefully interpreted since processor costs, the increase in overhead with an increase in processors, and behavioral variables reflecting the user perspective are excluded.