Performance computation for precharacterized CMOS gates with RC loads
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Tài liệu tham khảo
dartu, 1994, a gate-delay model for high-speed cmos circuits, 31st Design Automation Conference, 576, 10.1145/196244.196562
dartu, 1994, a gate-delay model for high-speed cmos circuits, 31st Design Automation Conference, 576, 10.1145/196244.196562
george, 1994, power analysis and characterization for semi-custom design, Proc Int Workshop Low Power Design, 215
o brien, 1989, modeling the driving-point characteristic of resistive interconnect for accurate delay estimation, Proc IEEE Int Conf Computer‐ Aided Design, 512
weste, 1992, principles of cmos vlsi design, Empirical Delay Models, 213